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Information about registers in SX1302 for encoding research

There is not a forum for 1302, so I am posting here.

My goal is to create an optimized 1302 configuration to explore different FEC schemes. I have trialed already on SX126x/7x. Now I want to do it on the 1302.

What I would love to have, is the register documentation for the 1302. If for some reason that's not possible, here is a list of specific things I really want understand:

- Extract soft-bits. If I can get soft-bit data reported, that's great, but also I can work with symbol SNR, LLR, anything of this sort.

- Understand Coding Rate capabilities. The SX127x and 6x devices support CR0 (4/4), which I have used already to trial some FEC schemes. It appears that SX1302 supports this also, but I don't know for sure.

- Understand frame reception capabilities. For example, methods for gating end-of-frame. On the SX126x/7x I can manipulate the frame size register while a packet is being downloaded as a way to use custom packet headers. The standard explicit header uses much weaker FEC than what I'm experimenting-with, so I use a custom header.

- Understand methods for adjusting symbol thresholds. Again, on SX126x/7x I can decrease preamble and validity thresholds. The external FECs I'm using are strong, and they can correct frames with 10% BER, so I want to experiment with loose thresholds.

I can look at the loragw_reg.h file from the sx1302_hal project (https://github.com/Lora-net/sx1302_hal/blob/master/libloragw/inc/loragw_reg.h) to see there are 1044 registers. In loragw_reg.c, I can see there are default values stored. But there is no documentation about these registers!

Best Regards,
JPN